intel-intrinsics v1.0.10 (2018-07-12T20:19:39Z)
Dub
Repo
__builtin_ia32_pmaxsw128
inteli
emmintrin
Undocumented in source.
version(LDC)
nothrow @
nogc
pragma(
LDC_intrinsic
, "llvm.x86.sse2.pmaxs.w") pure @
safe
short8
__builtin_ia32_pmaxsw128
(
short8
,
short8
)
Meta
Source
See Implementation
inteli
emmintrin
aliases
_mm_adds_epi16
_mm_adds_epi8
_mm_adds_epu16
_mm_adds_epu8
_mm_clflush
_mm_comieq_sd
_mm_comige_sd
_mm_comigt_sd
_mm_comile_sd
_mm_comilt_sd
_mm_comineq_sd
_mm_cvtepi32_ps
_mm_cvtpd_epi32
_mm_cvtpd_ps
_mm_cvtps_epi32
_mm_cvtsd_si32
_mm_cvtsd_si64
_mm_cvtsd_si64x
_mm_cvtsd_ss
_mm_cvtsi128_si64x
_mm_cvtsi64x_sd
_mm_cvtsi64x_si128
_mm_cvttpd_epi32
_mm_cvttps_epi32
_mm_cvttsd_si32
_mm_cvttsd_si64
_mm_cvttsd_si64x
_mm_lfence
_mm_load1_pd
_mm_madd_epi16
_mm_maskmoveu_si128
_mm_max_epi16
_mm_max_epu8
_mm_max_pd
_mm_max_sd
_mm_mfence
_mm_min_epi16
_mm_min_epu8
_mm_min_pd
_mm_min_sd
_mm_movemask_epi8
_mm_movemask_pd
_mm_mul_epu32
_mm_mulhi_epi16
_mm_mulhi_epu16
_mm_packs_epi16
_mm_packs_epi32
_mm_packus_epi16
_mm_pause
_mm_sad_epu8
_mm_set1_pd
_mm_sll_epi16
_mm_sll_epi32
_mm_sll_epi64
_mm_slli_epi16
_mm_slli_epi32
_mm_slli_epi64
_mm_sra_epi16
_mm_sra_epi32
_mm_srai_epi16
_mm_srai_epi32
_mm_srl_epi16
_mm_srl_epi32
_mm_srl_epi64
_mm_srli_epi16
_mm_srli_epi32
_mm_srli_epi64
_mm_store1_pd
_mm_subs_epi16
_mm_subs_epi8
_mm_subs_epu16
_mm_subs_epu8
_mm_ucomieq_sd
_mm_ucomige_sd
_mm_ucomigt_sd
_mm_ucomile_sd
_mm_ucomilt_sd
_mm_ucomineq_sd
functions
__builtin_ia32_cmppd
__builtin_ia32_pmaxsw128
__builtin_ia32_pmaxub128
__builtin_ia32_pminsw128
__builtin_ia32_pminub128
_mm_add_epi16
_mm_add_epi32
_mm_add_epi64
_mm_add_epi8
_mm_add_pd
_mm_add_sd
_mm_and_pd
_mm_and_si128
_mm_andnot_pd
_mm_andnot_si128
_mm_avg_epu16
_mm_avg_epu8
_mm_castpd_ps
_mm_castpd_si128
_mm_castps_pd
_mm_castps_si128
_mm_castsi128_pd
_mm_castsi128_ps
_mm_cmpeq_epi16
_mm_cmpeq_epi32
_mm_cmpeq_epi8
_mm_cmpeq_pd
_mm_cmpeq_sd
_mm_cmpge_pd
_mm_cmpge_sd
_mm_cmpgt_pd
_mm_cmpgt_sd
_mm_cmple_pd
_mm_cmple_sd
_mm_cmplt_pd
_mm_cmplt_sd
_mm_cmpneq_pd
_mm_cmpneq_sd
_mm_cmpnge_pd
_mm_cmpnge_sd
_mm_cmpngt_pd
_mm_cmpngt_sd
_mm_cmpnle_pd
_mm_cmpnle_sd
_mm_cmpnlt_pd
_mm_cmpnlt_sd
_mm_cmpord_pd
_mm_cmpord_sd
_mm_cmpunord_pd
_mm_cmpunord_sd
_mm_cvtsd_f64
_mm_cvtsi128_si32
_mm_cvtsi128_si64
_mm_cvtsi32_sd
_mm_cvtsi32_si128
_mm_cvtsi64_sd
_mm_cvtsi64_si128
_mm_cvtss_sd
_mm_div_ps
_mm_div_sd
_mm_extract_epi16
_mm_insert_epi16
_mm_load_pd
_mm_load_pd1
_mm_load_sd
_mm_load_si128
_mm_loadh_pd
_mm_loadl_epi64
_mm_loadl_pd
_mm_loadr_pd
_mm_loadu_pd
_mm_loadu_si128
_mm_move_epi64
_mm_move_sd
_mm_mul_pd
_mm_mul_sd
_mm_mullo_epi16
_mm_or_pd
_mm_or_si128
_mm_set1_epi16
_mm_set1_epi32
_mm_set1_epi64x
_mm_set1_epi8
_mm_set_epi16
_mm_set_epi32
_mm_set_epi64x
_mm_set_epi8
_mm_set_pd
_mm_set_pd1
_mm_set_sd
_mm_setr_epi16
_mm_setr_epi32
_mm_setr_epi64
_mm_setr_epi8
_mm_setr_pd
_mm_setzero_pd
_mm_setzero_si128
_mm_shuffle_epi32
_mm_shuffle_pd
_mm_shufflehi_epi16
_mm_shufflelo_epi16
_mm_slli_si128
_mm_sqrt_pd
_mm_sqrt_sd
_mm_srli_si128
_mm_store_pd
_mm_store_pd1
_mm_store_sd
_mm_store_si128
_mm_storeh_pd
_mm_storel_epi64
_mm_storel_pd
_mm_storer_pd
_mm_storeu_pd
_mm_storeu_si128
_mm_sub_epi16
_mm_sub_epi32
_mm_sub_epi64
_mm_sub_epi8
_mm_sub_pd
_mm_sub_sd
_mm_undefined_pd
_mm_undefined_si128
_mm_unpackhi_epi16
_mm_unpackhi_epi32
_mm_unpackhi_epi64
_mm_unpackhi_epi8
_mm_unpackhi_pd
_mm_unpacklo_epi16
_mm_unpacklo_epi32
_mm_unpacklo_epi64
_mm_unpacklo_epi8
_mm_unpacklo_pd
_mm_xor_pd
_mm_xor_si128